Semiconductors, or computer chips, are found in virtually every electrical product manufactured today. Chips are used not only in sophisticated industrial and commercial electronic equipment, but also in many household and consumer items such as televisions, clothes washers and dryers, radios, and telephones. As products become smaller and more functional, there is a need to include more chips in the smaller products to perform the functionality. The reduction in size of cellular telephones is one example of how more capabilities are incorporated into smaller electronic products.
As the demand for semiconductor devices with low-cost, high performance, increased miniaturization, and greater packaging densities has increased, devices having multiple dies, such as Multi-Chip Module (MCM) structures or similar stacked die structures have been developed to meet the demand. MCM structures have a number of dies and other semiconductor components mounted within a single semiconductor package. The number of dies and other components can be mounted in a vertical manner, a lateral manner, or combinations thereof.
One such approach is to stack one die on top of another die and then enclose the stack of dies in one package. The final package for a semiconductor with stacked dies is much smaller than would result if the dies were each packaged separately. In addition to providing a smaller size, stacked-die packages offer a number of advantages that relate to the manufacturing of the package, such as ease of handling and assembly.
In a stacked-die arrangement, the dies are wire-bonded sequentially, typically with automated wire-bonding equipment employing well-known thermal compression or ultrasonic wire-bonding techniques. During the wire-bonding process, the head of a wire-bonding apparatus applies a downward pressure on a conductive wire held in contact with a wire-bonding pad on the die to weld, or bond, the wire to the bonding pad on the die.
In many cases, stacked-die semiconductors can be fabricated faster and more cheaply than several semiconductors, each having a single die, which perform the same functions. A stacked-die approach is advantageous because of the increase in circuit density achieved and the ability to perform differing functionality, e.g., memory, logic, application specific integrated circuit (ASIC), within the same package. As a result, such multiple die package technologies as chip scale packaging (CSP), including ball grid array (BGA) and flip chip (bumped devices), and wafer level packaging (WLCSP) have been implemented. Further integration with passive devices using technologies such as System-in-Package (SiP) and chip scale module packaging (CSMP) have been commonly used.
However, the desire to achieve higher integration using the various technologies discussed previously generally causes a final package structure to be either larger in footprint or thicker. Greater integration has generally resulted in a tradeoff sacrifice of package miniaturization.